Silicon Laboratories SI4421 User Manual

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Rev. 1.1 7/09 Copyright © 2009 by Silicon Laboratories Si4702/03-C19
Si4702/03-C19
BROADCAST FM RADIO TUNER FOR PORTABLE APPLICATIONS
Features
Applications
Description
The Si4702/03 integrates the complete tuner function from antenna input
to stereo audio output for FM broadcast radio reception.
Functional Block Diagram
This data sheet applies to
Si4702/03-C Firmware 19 and
greater
Worldwide FM band support
(76–108 MHz)
Digital low-IF receiver
Frequency synthesizer with
integrated VCO
Seek tuning
Automatic frequency control (AFC)
Automatic gain control (AGC)
Excellent overload immunity
Signal strength measurement
Programmable de-emphasis
(50/75 µs)
Adaptive noise suppression
Volume control
Line-level analog output
32.768 kHz reference clock
2-wire and 3-wire control
interface
2.7 to 5.5 V supply voltage
Integrated LDO regulator
allows direct connection to
battery
3 x 3 mm 20-pin QFN package
Pb-free/RoHS compliant
RDS/RBDS Processor (Si4703)
Integrated crystal oscillator
Cellular handsets
MP3 players
Portable radios
USB FM radio
PDAs
Notebook PCs
Portable navigation
Consumer electronics
VIO
CONTROLLER
I
ADC
Q
ADC
Si4702/03
DSP
FILTER
DEMOD
MPX
AUDIO
SCLK
SDIO
CONTROL
INTERFACE
SEN
DAC
DAC
ROUT
LOUT
0 / 90 LOW-IF
RSSI
TUNE
GPIO
AMPLIFIER
GPIO
RST
RFGND
LNA
FMIP
AFC
AGC
PGA
RCLK
REG
VA
VD
32.768 kHz
2.7–5.5 V
Headphone
Cable
RDS
(Si4703)
XTAL
OSC
U.S. and International Patents
pending—Abbreviated U.S. Patent
List:
7272375, 7127217, 7272373,
7272374, 7321324, 7339503,
7339504, 7355476, 7426376,
7436252, 7471940
Ordering Information:
See page 38.
Pin Assignments
(Top View)
Si4702/03-GM
GND
PAD
1
GPIO1
RCLK
GND
LOUT
ROUT
RST
NC
GND
SDIO
SCLK
GND
FMIP
RFGND
GPIO2
V
D
NC
GPIO3
V
IO
SEN
V
A
2
5
4
3
6
15
12
13
14
7 1098
11
17181920 16
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Summary of Contents

Page 1 - Si4702/03-C19

Rev. 1.1 7/09 Copyright © 2009 by Silicon Laboratories Si4702/03-C19Si4702/03-C19BROADCAST FM RADIO TUNER FOR PORTABLE APPLICATIONSFeaturesApplicatio

Page 2

Si4702/03-C1910 Rev. 1.1Table 7. 2-Wire Control Interface Characteristics1,2,3(VD = VA = 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)Parameter

Page 3 - TABLE OF CONTENTS

Si4702/03-C19Rev. 1.1 11Figure 5. 2-Wire Control Interface Read and Write Timing ParametersFigure 6. 2-Wire Control Interface Read and Write Timing Di

Page 4 - 1. Electrical Specifications

Si4702/03-C1912 Rev. 1.1Table 8. FM Receiver Characteristics1,2(VD = VA = 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)Parameter Symbol Test Co

Page 5

Si4702/03-C19Rev. 1.1 13Mono/Stereo Switching Level3,8,12BLNDADJ = 1010 dB stereo separation—34—dBµVEMFAudio Mono S/N3,4,5,6,955 60 — dBAudio Stereo S

Page 6

Si4702/03-C1914 Rev. 1.12. Typical Application SchematicNotes:1. Place C1 close to VD pin.2. All grounds connect directly to GND plane on PCB.3. Pi

Page 7

Si4702/03-C19Rev. 1.1 154. Functional DescriptionFigure 7. Si4702/03-C19 FM Receiver Block Diagram4.1. OverviewThe Si4702/03-C19 extends Silicon Lab

Page 8

Si4702/03-C1916 Rev. 1.1and Antenna Interface". Conformance to theseguidelines will help to ensure excellent performanceeven in weak signal or no

Page 9

Si4702/03-C19Rev. 1.1 17combine the stereo left and right audio channels to amono (L+R) audio signal as the signal quality degradesto maintain optimum

Page 10

Si4702/03-C1918 Rev. 1.1For additional recommendations on optimizing the seekfunction, consult "AN284: Si4700/01/02/03 SeekAdjustability and Sett

Page 11

Si4702/03-C19Rev. 1.1 19writes, starting with the upper byte of register 02h,followed by the lower byte of register 02h, and onwarduntil the lower byt

Page 12

Si4702/03-C192 Rev. 1.1

Page 13

Si4702/03-C1920 Rev. 1.1When proper voltages are applied to theSi4702/03-C19, the ENABLE and DISABLE bits inRegister 02h can be used to select between

Page 14

Si4702/03-C19Rev. 1.1 21To power up the device (after power down):1. Note that VIO is still supplied in this scenario. If VIO is not supplied, refer t

Page 15 - 4.2. FM Receiver

Si4702/03-C1922 Rev. 1.15. Register SummaryReg1Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D000h DEVICEID PN[3:0] MFGID[11:0]01h CHIPID R

Page 16

Si4702/03-C19Rev. 1.1 236. Register DescriptionsReset value = 0x1242Si4702C19 Reset value = 0x1053 if ENABLE = 1Si4702C19 Reset value = 0x1000 if ENA

Page 17 - 4.6. Tuning

Si4702/03-C1924 Rev. 1.1Reset value = 0x0000Register 02h. Power ConfigurationBit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0NameDSMUTE DMUT

Page 18 - 4.8. Control Interface

Si4702/03-C19Rev. 1.1 25Reset value = 0x00007 Reserved Reserved.Always write to 0.6 DISABLE Powerup Disable.Refer to “4.9. Reset, Powerup, and Powerdo

Page 19

Si4702/03-C1926 Rev. 1.1Reset value = 0x0000Register 04h. System Configuration 1Bit D15 D14 D13D12D11D10D9D8D7D6D5D4D3D2D1D0NameRDSIEN STCIEN 0 RDS D

Page 20

Si4702/03-C19Rev. 1.1 273:2 GPIO2[1:0] General Purpose I/O 2.00 = High impedance (default).01 = STC/RDS interrupt. A logic high will be output unless

Page 21

Si4702/03-C1928 Rev. 1.1Reset value = 0x0000Register 05h. System Configuration 2BitD15D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0Name SEEKTH[7:0] BAND[1:0] S

Page 22

Si4702/03-C19Rev. 1.1 29Reset value = 0x0000Register 06h. System Configuration 3Bit D15 D14 D13 D12 D11 D10 D9 D8 D7D6D5D4D3D2D1D0Name SMUTER[1:0] SM

Page 23 - 6. Register Descriptions

Si4702/03-C19Rev. 1.1 3TABLE OF CONTENTSSection Page1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Page 24

Si4702/03-C1930 Rev. 1.1Reset value = 0x0100Register 07h. Test 1Bit D15 D14 D13D12D11D10D9 D8D7D6D5D4D3D2D1D0Name XOSCEN AHIZEN ReservedType R/W R/W

Page 25

Si4702/03-C19Rev. 1.1 31Reset value = 0x0000Reset value = 0x0000Register 08h. Test 2Bit D15D14D13D12D11D10D9 D8D7D6D5D4D3D2D1D0Name ReservedType R/WB

Page 26

Si4702/03-C1932 Rev. 1.1Reset value = 0x0000Register 0Ah. Status RSSIBit D15D14D13 D12 D11D10D9 D8D7D6D5D4D3D2D1D0Name RDSR STC SF/BL AFCRL RDSS BLER

Page 27

Si4702/03-C19Rev. 1.1 338STStereo Indicator.0 = Mono.1 = Stereo.Stereo indication is also available on GPIO3 by setting GPIO3 04h[5:4] = 01.7:0 RSSI[7

Page 28

Si4702/03-C1934 Rev. 1.1Reset value = 0x0000Register 0Bh. Read ChannelBitD15D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0Name BLERB[1:0] BLERC[1:0] BLERD[1:0]

Page 29

Si4702/03-C19Rev. 1.1 35Reset value = 0x0000Reset value = 0x0000Register 0Ch. RDSABit D15D14D13D12D11D10D9 D8D7D6D5D4D3D2D1D0Name RDSA[15:0]Type RBit

Page 30

Si4702/03-C1936 Rev. 1.1Reset value = 0x0000Reset value = 0x0000Register 0Eh. RDSCBit D15D14D13D12D11D10D9 D8D7D6D5D4D3D2D1D0Name RDSC[15:0]Type RBit

Page 31

Si4702/03-C19Rev. 1.1 377. Pin Descriptions: Si4702/03-C19Pin Number(s) Name Description1, 20 NC No Connect. Leave floating.2 FMIP FM RF inputs.3 RFG

Page 32

Si4702/03-C1938 Rev. 1.18. Ordering GuidePartNumber*DescriptionPackageTypeOperatingTemperatureSi4702-C19-GM Portable Broadcast Radio TunerFM StereoQF

Page 33

Si4702/03-C19Rev. 1.1 399. Package Markings (Top Marks)9.1. Si4702 Top MarkFigure 10. Si4702 Top Mark9.2. Si4703 Top MarkFigure 11. Si4703 Top Mark

Page 34

Si4702/03-C194 Rev. 1.11. Electrical SpecificationsTable 1. Recommended Operating ConditionsParameter Symbol Test Condition Min Typ Max UnitDigital S

Page 35

Si4702/03-C1940 Rev. 1.110. Package Outline: Si4702/03-C19Figure 12 illustrates the package details for the Si4702/03-C19. Table 10 lists the values

Page 36

Si4702/03-C19Rev. 1.1 4111. PCB Land Pattern: Si4702/03-C19Figure 13 illustrates the PCB land pattern details for the Si4702/03-C19. Table 11 lists t

Page 37

Si4702/03-C1942 Rev. 1.1Table 11. PCB Land Pattern DimensionsSymbol Millimeters Symbol MillimetersMin Max Min MaxD 2.71 REF GE 2.10 —D2 1.60 1.80 W —

Page 38 - 8. Ordering Guide

Si4702/03-C19Rev. 1.1 43ADDITIONAL REFERENCE RESOURCES AN230: Si4700/01/02/03 Programming Guide AN231: Si4700/01/02/03 Headphone and Antenna Interfa

Page 39 - 9.3. Top Mark Explanation

Si4702/03-C1944 Rev. 1.1DOCUMENT CHANGE LISTRevision 0.8 to Revision 0.9 Updated Figure 1, “Reset Timing Parameters for Busmode Select Method 1 (GPIO

Page 40

Si4702/03-C19Rev. 1.1 45NOTES:

Page 41

Si4702/03-C1946 Rev. 1.1CONTACT INFORMATIONSilicon Laboratories Inc.400 West Cesar ChavezAustin, Texas 78701Tel:1+ (512) 416-8500Fax:1+ (512) 416-9669

Page 42

Si4702/03-C19Rev. 1.1 5Table 3. DC Characteristics1(VD = VA = 2.7 to 3.6 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)Parameter Symbol Test Condition Min

Page 43

Si4702/03-C196 Rev. 1.1Figure 1. Reset Timing Parameters for Busmode Select Method 1 (GPIO3 = 0)Table 4. Reset Timing Characteristics (Busmode Select

Page 44 - Revision 1.0 to Revision 1.1

Si4702/03-C19Rev. 1.1 7Figure 2. Reset Timing Parameters for Busmode Select Method 2 (GPIO3 = 1)Table 5. Reset Timing Characteristics (Busmode Select

Page 45

Si4702/03-C198 Rev. 1.1Figure 3. 3-Wire Control Interface Write Timing ParametersTable 6. 3-Wire Control Interface Characteristics(VD = VA = 2.7 to 5.

Page 46

Si4702/03-C19Rev. 1.1 9Figure 4. 3-Wire Control Interface Read Timing Parameters½ Cycle Bus TurnaroundSCLK70%30%SEN70%30%SDIO80%20%tHSDIOtCDVtCDZAddre

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