Silicon Laboratories Stepper Machine Specifications download pdf (Page 177)

C8051F330/1

Rev. 1.1 177

18.2. Timer 2

Timer 2 is a 16-bit timer formed by two 8-bit SFRs: TL2 (low byte) and TH2 (high byte). Timer 2 may operate in 16-

bit auto-reload mode or (split) 8-bit auto-reload mode. The T2SPLIT bit (TMR2CN.3) defines the Timer

2 operation

mode.

Timer 2 may be clocked by the system clock, the system clock divided by 12, or the external oscillator source divided

by 8. The external clock mode is ideal for real-time clock (RTC) functionality, where the internal oscillator drives the

system clock while Timer 2 (and/or the PCA) is clocked by an external precision oscillator. Note that the external

oscillator source divided by 8 is synchronized with the system clock.

18.2.1. 16-bit Timer with Auto-Reload

When T2SPLIT (TMR2CN.3) is zero, Timer 2 operates as a 16-bit timer with auto-reload. Timer 2 can be clocked by

SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the 16-bit timer register

increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 2 reload registers (TMR2RLH and

TMR2RLL) is loaded into the Timer

2 register as shown in Figure 18.11, and the Timer 2 High Byte Overflow Flag

(TMR2CN.7) is set. If Timer 2 interrupts are enabled (if IE.5 is set), an interrupt will be generated on each Timer 2

overflow. Additionally, if Timer

2 interrupts are enabled and the TF2LEN bit is set (TMR2CN.5), an interrupt will be

generated each time the lower 8 bits (TL2) overflow from 0xFF to 0x00.

Figure 18.11. Timer 2 16-Bit Mode Block Diagram

External Clock / 8

SYSCLK / 12

SYSCLK

TL2 TH2

TMR2RLL TMR2RLH

Reload

TCLK

TR2

TMR2CN

T2SPLIT

TF2CEN

TF2L

TF2H

T2XCLK

TR2

T2XCLK

Interrupt

TF2LEN

To ADC,

SMBus

To SMBus

TL2

Overflow

CKCON

1 2 ... 172 173 174 175 176 177 178 179 180 181 182 ... 203 204

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Silicon Laboratories Stepper Machine Specifications Page 177

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