Silicon Laboratories Stepper Machine Specifications download pdf (Page 18)

C8051F330/1

18 Rev. 1.1

1.1.3. Additional Features

The C8051F330/1 SoC family includes several key enhancements to the CIP-51 core and peripherals to improve per-

formance and ease of use in end applications.

The extended interrupt handler provides 14 interrupt sources into the CIP-51 (as opposed to 7 for the standard 8051),

allowing numerous analog and digital peripherals to interrupt the controller. An interrupt driven system requires less

intervention by the MCU, giving it more effective throughput. The extra interrupt sources are very useful when build

ing multi-tasking, real-time systems.

Eight reset sources are available: power-on reset circuitry (POR), an on-chip VDD monitor (forces reset when power

supply voltage drops below V

RST

as given in Table 10.1 on page 96), a Watchdog Timer, a Missing Clock Detector, a

voltage level detection from Comparator0, a forced software reset, an external reset pin, and an illegal FLASH access

protection circuit. Each reset source except for the POR, Reset Input Pin, or FLASH error may be disabled by the user

in software. The WDT may be permanently enabled in software after a power-on reset during MCU initialization.

The internal oscillator factory calibrated to 24.5 MHz ±2%. This internal oscillator period may be user programmed

in ~0.5% increments. An additional low-frequency oscillator is also available which facilitates low-power operation.

An external oscillator drive circuit is included, allowing an external crystal, ceramic resonator, capacitor, RC, or

CMOS clock source to generate the system clock. If desired, the system clock source may be switched on-the-fly

between both internal and external oscillator circuits. An external oscillator can also be extremely useful in low

power applications, allowing the MCU to run from a slow (power saving) source, while periodically switching to the

fast (up to 25

MHz) internal oscillator as needed.

PCA

WDT

Missing

Clock

Detector

(one-

shot)

(Software Reset)

System Reset

Reset

Funnel

Px.x

SWRSF

Internal

Oscillator

System

Clock

CIP-51

Microcontroller

Core

Extended Interrupt

Handler

Clock Select

WDT

Enable

MCD

Enable

XTAL1

XTAL2

External

Oscillator

Drive

Errant

FLASH

Operation

/RST

(wired-OR)

Power On

Reset

'0'

Comparator 0

C0RSEF

VDD

Supply

Monitor

Enable

Low

Frequency

Oscillator

Figure 1.4. On-Chip Clock and Reset

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 203 204

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